Compilation of notes for Fundamentals of Computer Systems class for Spring 2023.
Problem Solving Tips Administrative Stuff Exams Grades Lecture 0 Lecture 1 CPU Models Addition in different bases Definitions Modular Arithmetic Integer format with word size restriction Unsigned binary numbers Binary Addition Algorithm (BAA) Negative numbers Signed Magnitude Representation 1’s Complement Problems with Signed Magnitude and 1’s Complement 2’s complement Intuition behind 2’s complement Lecture 2 Why 2’s complement? Easy subtraction Detecting Overflow Floating Points IEEE standard for a 32 bit word Doubles Underflow Boolean Algebra Boolean Algebra Identities Distributive Law Proof DeMorgan’s Theorem Consensus Theorem circuit Representation of Boolean Algebra Coverting Circuits to Booleans NAND and NOR XOR Duals Lecture 3 Sum of Products (SoP) Product of Sums (PoS) Convert SoP to PoS Minterms Maxterms Karnaugh Map K-map Notation Summary of Simplification with k-maps 2-bit multiplier Don’t Care Conditions Drawing Circuits Lecture 4 Standard Circuits Enabler Decoder Circuit Decoder With Enable MUX (Multiplexer) Representing Functions with Decoders and MUXes MUX trick Shifter Circuit Barrel Shift left w/ Wraparound L-R Shift Circuit with Rollout Unsigned Adder Circuit Half-Adder Full-Adder Signed Adder/Subtractor (2’s-C) Ripple Carry Adder Optimizing Ripple Carry (Carry Lookahead) Merge with known 0’s Code Converter Contraction Example 1 Lecture 5 Latch Intuition SR Latch SR Latch with Control D Latch with control Latches Can’t be Clocked Flip Flops JK Flip Flop (JKFF) Flip Flop Table Trigger Types Sequential Circuit State Machines Registers Register MUXing Shift Register Ripple Counter PLA (Programmable Logic Devices) MIPS Programming Parts of a Program Computer Hardware CPU Memory Clock ISA (Instruction Set Architecture) Programming in MIPS Instruction Types Memory Pointers $pc sp Constants Sign-extend Pseudoinstructions Things to Remember Assembly Code ALU Details of Memory Single Memory Cell Coincident Selection Extending Memory Why is memory not clocked? Architectures Single Cycle Architectures (SCA) Control Control Flow Pipelines MIPS Dependencies Hazards Implementing Hazard Correction Caching Locality Blocks Cache Hits and Misses Direct mapping Fully Associative Caching Set Associative Caching Writing to Main Memory Virtual Memory Problem Solving Tips Break down problems into manageable sub-problems If you get stuck, take a break, then slowly and methodically think through the sticking point (ie. break it down more. Make sure you are reading the problem correctly) Write in your own words what you need to do Remember that everything happens in parallel, and you only keep the results that you want Administrative Stuff Exams Midterm: On March 8th, 6-9 pm (tentative) Check for conflicts End-of-term exam: Either April 27, evening (6-9 pm) or May 5 in the evening Fill in exam conflicts (by 1/24) Acceptable excuses: conflicting classes and religious conflicts Fill in P-credit office hours (By 1/21) Go to web form The top row indicates the start time of the office hours (e.g. 12 means 12-1. 12:30 means 12:30-1) Need at least 10 hours selected Email for help: 3827-staff[at]googlegroups.com Include 3827 in subject header. Otherwise, it will get overlooked Use EdStem for class updates instead of Courseworks, as well as to ask questions b/c it will be faster than email Grades P Credit has a score between 0 to .3 P = 0 you never attend P = .3 you attend every P-cred and actively participate The final grade is G = 100P+(1-P)(10H+max(30M+60F,45M+45*F)) H is the percent correct on the HW M is the percent correct on the midterm F is the percent correct on the final Lecture 0 Work on HW0 (Not graded) Why should I care about this course? Shows how computers run “under the hood” Learn “parallel thinking” Humans think sequentially Circuits run multiple “threads” at once Useful to understand these ideas in many domains Systems Programming Languages (Compilers and Interpreters) Quantum Computing ML/AI Lecture 1 CPU Models CPU: “brain” of the computer Control Unit: D oes calculations on data in datapath Memory: Stores data (for later use) I/O: Interface to the outside (disk, network, monitor, keyboard, mouse, etc.) Simpler model of CPU: Discrete inputs (over time) Discrete Information Processing System communicates with System state and output something based on input System State Remembers previous information Addition in different bases humans: 10 digits: {0,1,2,3,4,5,6,7,8,9} $(4537.8)_{10} = 4*10^{3}+5*10^{2}+3*10{1}+7*10^{0}+8*10^{-1}$ Shifting everything to the left is multiplication by 10 computers: 2 digits: {0,1} $(1011.1)_{2} = 1*2^{3}+0*2^{2}+1*2^{1}+1*2^{0}+1*2^{-1} = 11.5$ Shifting everything to the left multiplies by 2 Hex: 16 digits {0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F} Hex numbers specified as 0x26BA $0x26BA = 2*16^{3}+6*16^{2}+11*16^{1}+10*16^{0} = (9914)_{10}$ We use hex since it is more human readable and is easy to convert to and from binary a base-2 4 digit can be multiplied by 16 by shifting 4 to the left ($1100 \rightarrow 1100\ 0000$) a base-16 1 digit can be multiplied by 16 by shifting 1 to the left ($0xD \rightarrow 0xD0$) To convert binary to hex, break hex into groups of 4 and convert each group to corresponding binary number $0010\ 1011 \rightarrow 0x2B$ For hex to binary, just convert each hex digit to the corresponding group in binary $0x2B \rightarrow 0010\ 1011$ Definitions True = 1, False = 0 Everything eventually converted to either 1 or 0 Numbers: 19 base 10 = 10011 base 2 Letters: each character is assigned to a 8 bit number Bits: a single binary digit (0 or 1) The leftmost bit is the highest order bit The rightmost bit is the lowest order bit Byte: A group of 8 bits. e.g. (10110010) Word: a grouping of bits computer-architecture dependent The number of bits that the computer architecture can process at once 64-bit word architectures expect data in 64-bit groupings The number of bits used by an architecture is called the word size Common notation for k-bit value: $b_{k-1}b_{k-2}…b_{1}b_{0}$ Modular Arithmetic Def: X mod Y = remainder (X/Y) remainder constrained between 0 and Y-1 Alternative definition: remainder constrained between $-\frac{Y}{2}$ and $\frac{Y}{2}-1$ 100 mod 9 = 1 -10 mod 3 = -1 mod 3 = 2 mod 3 X mod Y = Z mod Y iff $X = Z+KY$ for some integer K Integer format with word size restriction For a given number of digits, how many possible values can you represent? $b^{d}$, where b is the base and d is the number of digits For 2 bit word size: {00, 01, 10, 11} As humans, we can assign whatever value to a distinct bit-sequence: 2 bit word size: {00: .234, 01:i, 10: 234, 11: asdf} Nonsensical , but allowed Unsigned binary numbers Positive integers of a fixed wordsize e.g. 1111 = 15 for a 4-bit word Binary Addition Algorithm (BAA) 1+1 = 0 with a carry of 1 eg. wordsize = 5, add 11110 and 10101 (30+21) 11110+10101 = 10011 if restricted to 5 bits Called overflow: when a result can’t fit within the wordsize constraint The correct answer needs 6 bits (110011) The answer may not be correct because of overflow, but it is correct up to mod $b^{d}$ Negative numbers Signed Magnitude Representation Let the highest order bit denote the sign of the number (0 is positive and 1 is negative) e.g. 0011 = 3 e.g. 1011 = -3 e.g. 1000 = 0000 = 0 To negate, simply flip the highest order bit 1’s Complement Again, highest order bit indicates sign (0 is positive and 1 is negative) To negate a value, flip all the bits 0010 = 2 1101 = -2 e.g. wordsize of 8, value is 11101001. 1’s Complement rep We know its negative (1 in highest order) Negate all the bits and read off positive value, then slap on negative sign Using this, 11101001 = -20 000000 = 111111 are both 0 in 1’s complement Problems with Signed Magnitude and 1’s Complement 0101+1101 = 0010 (after dropping carry of 1) Unsigned binary: 5+8 = 2 (correct mod 16) Signed magnitude: 5+ (-5) = 0 (not 2, even up to mod 16) 1’s complement: 5+(-2) = 3 (not 2, even up to mod 16) TL;DR Binary Addition Algorithm doesn’t work 2’s complement highest order bit is still sign To negate a number, flip all the bits (like 1’s complement) then add 1 in binary (eg a 4 bit word size, you add 0001) 0010 = 2 so 1101+0001 = 1110 = -2 1101 = -3 so 0010+0001 = 0011 = 3 (works for negative) 0 is unique in 2’s complement (0000 = 1111+0001 = 0000) “100000” maps to itself in 2’s complement (largest negative number of the word size) 2’s complement always work with BAA (meaning that with any overflow, the result is off by mod $2^{wordsize}$) Intuition behind 2’s complement Let X be some word of size k Negate all the bits of X and call it Y e.g. X = 100101, so Y = 011010 $X+Y$ using BAA always equals a a word of size k whose entries are entirely 1s $X+Y$ = 111111 Adding the the decimal number 1 to $X+Y$ (ie 000001) causes overflow which yields a word of only zeros. So we can think of the operation of flipping all the bits and adding decimal 1 to a string as the negation of X Lecture 2 The range of unsigned integers is 0 to $2^{k}-1$ The range of signed integers is $-2k^{k-1}$ to $2k^{k-1}$ A string if bits is useless unless you know what representation they represent (unsigned, signed ,ASCII, etc.) Representation: How you interpret the bits Operations: do something to the bits (independent of representation) Why 2’s complement? Easy subtraction Say that we want to find 001110-010101 in signed magnitude representation (14-21). It the same procedure as in base 10, but in base 2 (including carries) Instead, make the representation the 2’s complement Negate 21, then apply BAA. You get the correct answer: 001110-010101=001110+101011=111001 (14-21=7) Detecting Overflow For 2’s complement: Look at the final 2 carries from the BAA algorithm. If the carries are different, you have overflow $00$ case: $5+1=6\rightarrow 0101+0001=0110=6$ $11$ case: $-5-3=-8\rightarrow 1011+1101=1000=-8$ $10$ case (overflow): $-2+-7=-9\rightarrow 1110+1001=0111=7$ $01$ case (overflow): $7+7=14\rightarrow 0111+0111=1110=-6$ Overflow just means that the result can’t be represented with the word size. It does not mean that the result is too big Floating Points Scientific notation: -7.776E3. The number to the left of the E is called the mantissa. The number to the right is the exponent In binary: $-1.10\times2^{01111}= -1.5*2^{7}$ IEEE standard for a 32 bit word highest order bit (31th) is the sign 0 is positive, 1 is negative exponent is bit 30 to 23 represent the value as an unsigned binary, then subtract 127 (the bias) Fraction (the rest of the bits) represents 1.XXXXXX. The “1.” is implicit for all floating point numbers, including zero. The mantissa represent the numbers after the decimal To approximate zero, you set all the bits to zero, which corresponds to $1.0*2^{-127}$, which is effectively zero Doubles A double uses two 32-bit words There is one sign bit, 11 exponent bits, and 52 fraction bits The first word has the sign bit, the exponent bits and the rest are the higher order bits of the fraction The second word is the rest of the fraction The bias is 1023 Underflow Say that we have a number X = 1E-83. Squaring X, we get Y = 1E-166. This cannot be represented as a float. This is referred to as underflow, which is a subcategory of overflow Boolean Algebra Either 0 or 1 (False or True) Can represent as a variable (X,Y,A,B) Complement of X is denoted as $\bar{X}$. This is just flipping a bit Literal a boolean variable or its complement $\cdot$ represents AND (can be omitted) + represents OR Left to right precedence. parentheses give priority to operations You daisy chain operations on multiple values by constructing a truth table where each column represents an unsigned integer Expressions is a set of literals (possibly with repeats) combined with logic operations Equations expression1=expression2 Functions: Takes in some literals and outputs an expression Boolean Algebra Identities $X+XY=X$ $X(X+Y)=X$ Distributive Law Proof $(X+Y)(X+Z) = XX+XZ+YX+YZ$ Apply $XX=X$, $X+XZ = X$, $X+YX=X$ sequentially to show final result DeMorgan’s Theorem Split the big bar at the operator Chance AND to OR and OR to AND Flip-flop literal 0 and 1 to each other Replace function F with the complement $\bar{F}$ and vice versa Consensus Theorem $XY+\bar{XZ}+YZ=XY+\bar{X}Z$ If $YZ = 0$, then trivially you can drop $YZ$ If $YZ=1$ both $Y$ and $Z$ are 1. $XY+\bar{X}Z+1 = 1$, so LHS is 1 Either $X$ or $\bar{X}$. Since $Y=Z=1$, either $XY$ or $\bar{X}Z$ is 1, so RHS is 1 circuit Representation of Boolean Algebra The depth of a circuit refers to how the maximum layers are between the input and output If you want to have multiple inputs, put more lines as the input on the left a k-input gate has a depth of $log_{2}(k)$ Coverting Circuits to Booleans Start from the RHS and move left As you pass each gate, write down the number of inputs in their own section Repeat until you get to your inputs NAND and NOR You invert the output of AND and OR respectively These are universal gates XOR XOR is denoted as $\otimes$ (either the first or the second is true, but not both) Used for parity control (how many of the inputs are true) $Y\otimes 0 = Y$ $Y\otimes 1 = \bar{Y}$ $X_{1}\otimes X_{2}\otimes…X_{k}=1$ when an odd number of $X_{i}=1$ Duals All booleans expressions have duals. TO construct the dual: Swap the ANDs and ORs, swap the literals 0 and 1 for each and rearrange the parentheses as needed You can take the complement of a function by taking the dual, then negating all the literals Lecture 3 Sum of Products (SoP) Any function can be represented as a product of sums (ie. ORing ANDS together) Do all the ANDs before the ORs To calculate, expand out all the terms, then remove duplicates G = X(Y+Z)(X+Y+Z) = XY+XZ Product of Sums (PoS) Any function can be represented as a sum of products (ie. ANDing many ORs together) Do all the ORs before the ANDs Convert SoP to PoS onvert function $F$ to SoP. Take the compliment of SoP by taking the dual and then complementing the literals. This is PoS Minterms Minterm is a product term in which all variable appear exactly once (either complemented or uncomplemented) You can refer to each minterm by the unsigned int that they represent (mX) A function can be described as a sum of its minterms You can evauluate when the function is true by looking at the minterms You can marginalize on a literal by including the minterms that include literal and its complement Minterm expansion is not a simplified form Maxterms The dual of minterms (ie a sum in which all variables appear exactly once, either complemented or uncomplemented) Denoted as MX The product expansion of a function in terms of maxterms Whenever the function evaluates to zero, these inputs correspond to a particular maxterm in the expansion Karnaugh Map Say that you have $F = X+\bar{X}Y$. How do you simplify this? Replace $X = X+XY$ and turn the crank to get $F=X+Y$ Not immediately obvious. Need an automatic tool to help Not the simplest form, but good enough Expand the truth table into a 2D grid indexed Y horizontally and X vertically (origin from the top-left and moves right and down) Each value of the input literal tells you where on the Karnaugh Map Let the vertical axis be X, and the horizontal be YZ Gray encoding: order values of YZ such that only one bit changes at a time Y goes on top, Z goes on bottom Minterm product terms correspond to a $2^{i} \times 2^{j}$ rectangle (including wraparounds) To find the simplest form you can derive from the k-map, you draw the largest rectangles you can (incluing wraparounds) and then relate these rectangles to products K-map Notation Implicant: a product term comprised of minterms for which the function F evaluates to 1 (ie. a box whose dimensions are powers of 2) Prime Implicant: there exists no other implicant that can contain this implicant Essential Prime Implicant: this implicant covers at least one minterm that is not covered by any other prime implicant Summary of Simplification with k-maps Identify all the prime and essential prime implicants Include all the essential PIs If any 1-valued minterms are uncovered by EPIs, choose PIs that are “big” and do a good job covering Heuristic: Choose the PIs that minimize overlap with one another and with EPIs 2-bit multiplier You have 2 2 bit numbers. You need 4 bits to represent the largest product Each bit in the output can be written as a k-map, which can be simplified to write what inputs correspond to this particular output bit getting turned on Don’t Care Conditions These are circumstances where the output doesn’t matter Going to the 2-bit multiplier, say that you know that some set of inputs will never occur. Hence you can ignore the output of those inputs when building a circuit Denote X as the outputs where you don’t care about the output In the k-map, replace the don’t care conditions with X. You can optionally cover X’s with EPI’s (ie. you can include X’s in larger boxes to simplify circuitry) Drawing Circuits Denote a circuit as a blob so you don’t have to redraw a circuit over and over again When an input changes, it takes time for the output to get updated Lecture 4 Standard Circuits NB: Think about circuits as having constant input Enabler Takes in data D (k bits in parallel), as well as an enable/disable trigger E. There is a single output of k bits If E=1, the output equals the input If E=0, output equals k 0’s Implement enabler with k AND gates. Each input has it’s own AND gate, and the other pin is the Enable input Decoder Circuit Takes in a k-bit input and $2^{k}$ 1-bit outputs The selector indicates as an unsigned binary which output = 1. All other outputs are zero Write truth table out. Each row is a minterm. Recall that each minterm evaluates for 1 for a unique combination of literals. You can write decoders with a combination of NOTs and ANDs Decoder With Enable Slap the two previous circuits together Push the output of the decoder through k AND gates where every AND gate has a input connected to the enable pin MUX (Multiplexer) Takes $2^{k}$ 1-bit data values as input. Has a k-bit selector that indicates in unsigned binary which data bit is output You push all the data values in as input simultaneously, and only the one you select is the output. All other inputs are dropped You have a selector part that chooses which input to select You pass all this data to an enabler, whose output gets passed to an OR gate Representing Functions with Decoders and MUXes Use a Decoder and OR together the minterms that evaluate to 1 of your function Use a Multiplexer where you feed in the output of your function. The input to the multiplexer is the values that your literals you take. The output is then your function MUX trick Look at your truth table in pairs of rows. You can select on A and B as the selector input. You pass the C input as one of the the $2^{k}$ 1-bit inputs and it’s complement Shifter Circuit k-bit data value enter as input l-bit selector in unsigned binary tells how many bits to shift k-bit output where bits are shifted by l-bits (can wraparound or drop out) Barrel Shift left w/ Wraparound Say you want to shift over by 2 with wrap around You use MUXes. Each output bit of the MUX goes to the output of the Shifter. All the MUXes have the same shift bit as their selector L-R Shift Circuit with Rollout ...