So I got checked out by my doctor, and it seems like the back pain that I experienced was just a very severe muscle spasm. I don’t show any signs of having a herniated disk, and I seems to have maintained full mobility and flexibility in my spine. I can even touch my toes again! Going forward, I’m going to need to be more cautious when doing stand-up, but other than that, I got off easy.
With regards to the camera module, I’m still struggling with getting the camera to work. I testbenched the camera stitching protocol against a working implementation, and it seems to function properly, so now I just need to travel up from the bottom of the stack and figure out what is going wrong. This is very tedious, takes a lot of effort, and something that I’ve been putting off…
In other Verilog news, I took a crack at a Verilog core for the GameTank during Spring Break. I updated my block diagram of the system that I made in January (see below; it has more colors now!).
I fleshed out a lot of the little modules, the biggest of which are the HDMI video pipeline, as well as the system and blitter control registers. I also figured out a way to circumnavigate the ubiquitous tri-state usage in the GameTank via combinational manager circuits and zeroing invalid read requests (it’s is a pain to do tri-state stuff on the internals of an FPGA). Next steps would be to incorporate the main CPU into the design, implement a convenient debugger (something UART based?), and try to run some simple programs before moving onto the more esoteric parts of the system.
With regards to the OS course, I got through the locking chapter of the OS book and am now knee-deep in learning about scheduling. I continue to punt the labs; I should go back and take another crack at them.
That’s all for now, see you next time ! (Still haven’t found a good way to finish these things off…)